130 search results - page 20 / 26 » Software Pipelined Execution of Stream Programs on GPUs |
101
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LCTRTS
2007
Springer
15 years 6 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
115
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DAMON
2007
Springer
15 years 6 months ago
2007
Springer
In this work, we research the suitability of the Cell Broadband Engine for database processing. We start by outlining the main architectural features of Cell and use microbenchmar...
87
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ASAP
2007
IEEE
15 years 6 months ago
2007
IEEE
Commodity accelerator technologies including reconfigurable devices provide an order of magnitude performance improvement compared to mainstream microprocessor systems. A number o...
124
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APLAS
2008
ACM
15 years 2 months ago
2008
ACM
ion of Clocks in Synchronous Data-flow Systems Albert Cohen1 , Louis Mandel2 , Florence Plateau2 , and Marc Pouzet23 1 INRIA Saclay - Ile-de-France, Orsay, France 2 LRI, Univ. Pari...
106
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ISPASS
2010
IEEE
15 years 7 months ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...