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EUROSYS
2008
ACM
15 years 9 months ago
Flicker: an execution infrastructure for tcb minimization
We present Flicker, an infrastructure for executing securitysensitive code in complete isolation while trusting as few as 250 lines of additional code. Flicker can also provide me...
Jonathan M. McCune, Bryan Parno, Adrian Perrig, Mi...
LCTRTS
2009
Springer
15 years 6 months ago
Push-assisted migration of real-time tasks in multi-core processors
Multicores are becoming ubiquitous, not only in general-purpose but also embedded computing. This trend is a reflexion of contemporary embedded applications posing steadily incre...
Abhik Sarkar, Frank Mueller, Harini Ramaprasad, Si...
LCTRTS
2009
Springer
15 years 6 months ago
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
Stephen Roderick Hines, Yuval Peress, Peter Gavin,...
FCCM
2009
IEEE
148views VLSI» more  FCCM 2009»
15 years 6 months ago
A Packet Generator on the NetFPGA Platform
— A packet generator and network traffic capture system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables rapid developmen...
G. Adam Covington, Glen Gibb, John W. Lockwood, Ni...
HIPEAC
2007
Springer
15 years 6 months ago
A Throughput-Driven Task Creation and Mapping for Network Processors
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-C...