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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 3 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
CORR
2008
Springer
143views Education» more  CORR 2008»
14 years 11 months ago
A Type System for Data-Flow Integrity on Windows Vista
The Windows Vista operating system implements an interesting model of multi-level integrity. We observe that in this model, trusted code must participate in any information-flow a...
Avik Chaudhuri, Prasad Naldurg, Sriram K. Rajamani
PLDI
2010
ACM
15 years 4 months ago
Jinn: synthesizing dynamic bug detectors for foreign language interfaces
Programming language specifications mandate static and dynamic analyses to preclude syntactic and semantic errors. Although individual languages are usually well-specified, comp...
Byeongcheol Lee, Ben Wiedermann, Martin Hirzel, Ro...
CODES
2008
IEEE
15 years 6 months ago
Scratchpad allocation for concurrent embedded software
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...
Vivy Suhendra, Abhik Roychoudhury, Tulika Mitra
CF
2011
ACM
13 years 11 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...