85 search results - page 4 / 17 » Software That Can Think |
124
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CGO
2010
IEEE
15 years 8 months ago
2010
IEEE
Reducing the arithmetic precision of a computation has real performance implications, including increased speed, decreased power consumption, and a smaller memory footprint. For s...
116
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CGO
2006
IEEE
15 years 7 months ago
2006
IEEE
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
CGO
2006
IEEE
15 years 5 months ago
2006
IEEE
In this work, we present several compiler optimizations to reduce the overhead due to software protection. We first propose an aggressive rematerialization algorithm which attempt...
CGO
2008
IEEE
15 years 8 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
CGO
2008
IEEE
15 years 8 months ago
2008
IEEE
We propose a new instruction, branch-on-random, that is like a standard conditional branch, except rather than specifying the condition on which the branch should be taken, it spe...