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» Software Transactional Memory on Relaxed Memory Models
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SIGSOFT
2006
ACM
15 years 8 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar
LCPC
1991
Springer
15 years 5 months ago
An Executable Representation of Distance and Direction
The dependence ow graph is a novel intermediate representation for optimizingand parallelizing compilersthat can be viewed as an executable representation of program dependences. ...
Richard Johnson, Wei Li, Keshav Pingali
CODES
2009
IEEE
15 years 8 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
HPDC
2008
IEEE
15 years 8 months ago
XenLoop: a transparent high performance inter-vm network loopback
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
Jian Wang, Kwame-Lante Wright, Kartik Gopalan
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
15 years 7 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram