744 search results - page 126 / 149 » Software Transactional Memory on Relaxed Memory Models |
ISPASS
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
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FMSD
2007
14 years 9 months ago
2007
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
VMCAI
2009
Springer
15 years 4 months ago
2009
Springer
This paper describes the methods used in Empire, a tool to detect concurrency-related bugs, namely atomic-set serializability violations in Java programs. The correctness criterion...
WWW
2009
ACM
15 years 10 months ago
2009
ACM
The performance of server-side applications is becoming increasingly important as more applications exploit the Web application model. Extensive work has been done to improve the ...