744 search results - page 54 / 149 » Software Transactional Memory on Relaxed Memory Models |
129
Voted
ISORC
2009
IEEE
15 years 10 months ago
2009
IEEE
There is increasing convergence between the fields of parallel and embedded computing. The demand for more functionality in embedded devices means that complex multicore architec...
124
Voted
SC
2005
ACM
15 years 9 months ago
2005
ACM
The memory consistency model in parallel programming controls the order in which operations performed by one thread may be observed by another. Language designers have been reluct...
140
Voted
ICFEM
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. We present a “memory-model-sensitive” approach to validating correctness properties for multithreaded programs. Our key insight is that by specifying both the inter-t...
153
Voted
PPOPP
2009
ACM
16 years 4 months ago
2009
ACM
On multiprocessors with explicitly managed memory hierarchies (EMM), software has the responsibility of moving data in and out of fast local memories. This task can be complex and...
135
Voted
DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...