744 search results - page 57 / 149 » Software Transactional Memory on Relaxed Memory Models |
105
Voted
ISCA
1998
IEEE
15 years 8 months ago
1998
IEEE
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory ac...
183
Voted
CAL
2011
14 years 3 months ago
2011
—In this paper we present DRAMSim2, a cycle accurate memory system simulator. The goal of DRAMSim2 is to be an accurate and publicly available DDR2/3 memory system model which ca...
149
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ISCA
2010
IEEE
15 years 5 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
149
Voted
EMSOFT
2001
Springer
15 years 8 months ago
2001
Springer
Abstract. This paper presents our experience implementing the memory management extensions in the Real-Time Specification for Java. These extensions are designed to given real-tim...
120
Voted
SOCO
2010
Springer
15 years 2 months ago
2010
Springer
Witnesses and victims of serious crime are often required to construct a facial composite, a visual likeness of a suspect’s face. The traditional method is for them to select in...