744 search results - page 72 / 149 » Software Transactional Memory on Relaxed Memory Models |
144
click to vote
LCTRTS
2010
Springer
15 years 10 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
137
click to vote
MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--Parallel programming is hard, because it is impractical to test all possible thread interleavings. One promising approach to improve a multi-threaded program's relia...
134
click to vote
MICRO
2009
IEEE
15 years 10 months ago
2009
IEEE
A platform that supported Sequential Consistency (SC) for all codes — not only the well-synchronized ones — would simplify the task of programmers. Recently, several hardware ...
149
click to vote
IEEEPACT
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
103
click to vote
PLDI
2010
ACM
15 years 8 months ago
2010
ACM
Traditional data-oriented programming languages such as dataflow s and stream languages provide a natural abstraction for parallel programming. In these languages, a developer fo...