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» Software Transactional Memory on Relaxed Memory Models
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142
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CACM
2010
179views more  CACM 2010»
15 years 3 months ago
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating syste...
Peter Sewell, Susmit Sarkar, Scott Owens, Francesc...
116
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OOPSLA
2009
Springer
15 years 10 months ago
Scalable nonblocking concurrent objects for mission critical code
The high degree of complexity and autonomy of future robotic space missions, such as Mars Science Laboratory (MSL), poses serious challenges in assuring their reliability and efï¬...
Damian Dechev, Bjarne Stroustrup
HIPEAC
2005
Springer
15 years 9 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
137
Voted
TC
2011
14 years 10 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
252
Voted
JCP
2008
155views more  JCP 2008»
15 years 3 months ago
Algorithm to Optimize Code Size and Energy Consumption in Real Time Embedded System
Processor is an important computing element in portable battery operated real time embedded system and it consumes most of the battery energy. Energy consumption, processor memory ...
Santosh D. Chede, Kishore D. Kulat