744 search results - page 84 / 149 » Software Transactional Memory on Relaxed Memory Models |
165
Voted
PLDI
2011
ACM
14 years 6 months ago
2011
ACM
Current proposals for concurrent shared-memory languages, including C++ and C, provide sequential consistency only for programs without data races (the DRF guarantee). While the i...
156
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DAC
2010
ACM
15 years 3 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
120
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MICRO
2006
IEEE
15 years 9 months ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
131
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ASPLOS
1992
ACM
15 years 7 months ago
1992
ACM
: In scalable parallel machines, processors can make local memory accesses much faster than they can make remote memory accesses. In addition, when a number of remote accesses must...
141
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FPL
2005
Springer
15 years 9 months ago
2005
Springer
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....