Sciweavers

744 search results - page 93 / 149
» Software Transactional Memory on Relaxed Memory Models
Sort
View
140
Voted
CODES
2006
IEEE
15 years 5 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
147
Voted
EUROPAR
1997
Springer
15 years 7 months ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
115
Voted
ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
16 years 17 days ago
In-Line Interrupt Handling for Software-Managed TLBs
The general-purpose precise interrupt mechanism, which has long been used to handle exceptional conditions that occur infrequently, is now being used increasingly often to handle ...
Aamer Jaleel, Bruce L. Jacob
111
Voted
SCAM
2008
IEEE
15 years 10 months ago
Using Program Transformations to Add Structure to a Legacy Data Model
An appropriate translation of the data model is central to any language migration effort. Finding a mapping between original and target data models may be challenging for legacy l...
Mariano Ceccato, Thomas Roy Dean, Paolo Tonella
125
Voted
AAAI
1998
15 years 5 months ago
Metacognition in Software Agents Using Classifier Systems
Software agents "living" and acting in a real world software environment, such as an operating system, a network, or a database system, can carry out many tasks for huma...
Zhaohua Zhang, Stan Franklin, Dipankar Dasgupta