2512 search results - page 249 / 503 » Software Transactional Memory |
156
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PARA
2004
Springer
15 years 10 months ago
2004
Springer
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
140
Voted
EUROMICRO
1998
IEEE
15 years 8 months ago
1998
IEEE
Several studies have demonstrated that out-of-order execution processors may not be the most adequate organization for wide issue processors due to the increasing penalties that w...
165
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CASES
2004
ACM
15 years 8 months ago
2004
ACM
New heterogeneous multiprocessor platforms are emerging that are typically composed of loosely coupled components that exchange data using programmable interconnections. The compon...
164
Voted
VLSISP
2008
15 years 4 months ago
2008
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
153
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JOC
2010
14 years 11 months ago
2010
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...