2512 search results - page 272 / 503 » Software Transactional Memory |
163
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DAC
2010
ACM
15 years 4 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
124
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ICCD
2008
IEEE
16 years 1 months ago
2008
IEEE
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
132
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IOLTS
2008
IEEE
15 years 10 months ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
142
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IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
155
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LCPC
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. To solve problems that require far more memory than a single machine can supply, data can be swapped to disk in some manner, it can be compressed, and/or the memory of mu...