2512 search results - page 328 / 503 » Software Transactional Memory |
136
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TASE
2009
IEEE
15 years 10 months ago
2009
IEEE
—Formal verification of low-level programs often requires explicit reasoning and specification of runtime stacks. Treating stacks naively as parts of ordinary heaps can lead to...
103
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CGO
2008
IEEE
15 years 10 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
143
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ISORC
2008
IEEE
15 years 10 months ago
2008
IEEE
Reusable libraries are problematic for real-time software in Java. Using Java’s standard class library, for example, demands meticulous coding and testing to avoid response time...
116
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SCAM
2008
IEEE
15 years 10 months ago
2008
IEEE
An appropriate translation of the data model is central to any language migration effort. Finding a mapping between original and target data models may be challenging for legacy l...
127
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VLSI
2007
Springer
15 years 10 months ago
2007
Springer
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...