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UIST
1997
ACM
15 years 8 months ago
Interactive Beautification: A Technique for Rapid Geometric Design
We propose interactive beautification, a technique for rapid geometric design, and introduce the technique and its algorithm with a prototype system Pegasus. The motivation is to ...
Takeo Igarashi, Satoshi Matsuoka, Sachiko Kawachiy...
ASPLOS
2010
ACM
15 years 7 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
CASES
2009
ACM
15 years 7 months ago
A case study of on-chip sensor network in multiprocessor system-on-chip
Reducing feature sizes and power supply voltage allows integrating more processing units (PUs) on multiprocessor system-on-chip (MPSoC) to satisfy the increasing demands of applic...
Yu Wang 0002, Jiang Xu, Shengxi Huang, Weichen Liu...
NSDI
2008
15 years 6 months ago
Designing and Implementing Malicious Hardware
Hidden malicious circuits provide an attacker with a stealthy attack vector. As they occupy a layer below the entire software stack, malicious circuits can bypass traditional defe...
Samuel T. King, Joseph Tucek, Anthony Cozzie, Chri...
ICDE
2010
IEEE
206views Database» more  ICDE 2010»
15 years 6 months ago
HECATAEUS: Regulating Schema Evolution
HECATAEUS is an open-source software tool for enabling impact prediction, what-if analysis, and regulation of relational database schema evolution. We follow a graph theoretic appr...
George Papastefanatos, Panos Vassiliadis, Alkis Si...
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