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KBSE
2008
IEEE
15 years 8 months ago
Reducing the Cost of Path Property Monitoring Through Sampling
Run-time monitoring can provide important insights about a program’s behavior and, for simple properties, it can be done efficiently. Monitoring properties describing sequences...
Matthew B. Dwyer, Madeline Diep, Sebastian G. Elba...
CODES
2006
IEEE
15 years 7 months ago
Thermal-aware high-level synthesis based on network flow method
Lowering down the chip temperature is becoming one of the important design considerations, since temperature adversely and seriously affects many of design qualities, such as reli...
Pilok Lim, Taewhan Kim
IHIS
2005
ACM
15 years 7 months ago
Verifying web services composition based on hierarchical colored petri nets
Current Web services composition proposals, such as BPML, BPEL, WSCI, and OWL-S, provide notations for describing the control and data flows in Web service collaborations. However...
Yanping Yang, QingPing Tan, Yong Xiao
CODES
2003
IEEE
15 years 7 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
KBSE
2002
IEEE
15 years 6 months ago
Generating Test Data for Functions with Pointer Inputs
Generating test inputs for a path in a function with integer and real parameters is an important but difficult problem. The problem becomes more difficult when pointers are pass...
Srinivas Visvanathan, Neelam Gupta