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ICS
2007
Tsinghua U.
15 years 6 months ago
Performance driven data cache prefetching in a dynamic software optimization system
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
Jean Christophe Beyler, Philippe Clauss
FPL
2009
Springer
117views Hardware» more  FPL 2009»
15 years 4 months ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
CONPAR
1994
15 years 4 months ago
A Software Architecture for Multidisciplinary Applications: Integrating Task and Data Parallelism
Data parallel languages such as Vienna Fortran and HPF can be successfully applied to a wide range of numerical applications. However, many advanced scienti c and engineering appl...
Barbara M. Chapman, Piyush Mehrotra, John Van Rose...
SAFECOMP
1998
Springer
15 years 4 months ago
An Agenda for Specifying Software Components with Complex Data Models
Abstract. We present a method to specify software for a special kind of safetycritical embedded systems, where sensors deliver low-level values that must be abstracted and pre-proc...
Kirsten Winter, Thomas Santen, Maritta Heisel
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
15 years 3 months ago
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools
- A 16-bit THUMB instruction set microprocessor is proposed for low cost/power in short-precision computing. It achieves 40% gate count, 51% power consumption and 160% clock freque...
Fu-Ching Yang, Ing-Jer Huang