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TCAD
2002
73views more  TCAD 2002»
15 years 2 months ago
A timing-constrained simultaneous global routing algorithm
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
15 years 5 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
TCOM
2010
87views more  TCOM 2010»
14 years 10 months ago
Performance of an AFC Loop in the Presence of a Single Interferer in a Fading Channel
The performance of an automatic frequency control (AFC) loop is investigated using two measures, the mean time to loss of lock and the average switching rate. The AFC is considere...
Amin Emad, Norman C. Beaulieu
ARCS
2012
Springer
13 years 11 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
ISPASS
2009
IEEE
15 years 10 months ago
Machine learning based online performance prediction for runtime parallelization and task scheduling
—With the emerging many-core paradigm, parallel programming must extend beyond its traditional realm of scientific applications. Converting existing sequential applications as w...
Jiangtian Li, Xiaosong Ma, Karan Singh, Martin Sch...