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CASES
2010
ACM
14 years 7 months ago
Hardware-based data value and address trace filtering techniques
Vladimir Uzelac, Aleksandar Milenkovic
IEEEPACT
2009
IEEE
15 years 4 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
80
Voted
IEEEPACT
2009
IEEE
15 years 4 months ago
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, X...
91
Voted
IPPS
2006
IEEE
15 years 3 months ago
Dynamically reconfigurable cache architecture using adaptive block allocation policy
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...
Milene Barbosa Carvalho, Luís Fabríc...
PDPTA
2008
14 years 11 months ago
Predicting Web Cache Behavior using Stochastic State-Space Models
Web caches play an important role in improving the surfing experience of Web clients and reducing the network traffic seen by Web servers. Accurate analytical models of Web caches ...
Amitayu Das, Ritendra Datta, Bhuvan Urgaonkar, Ana...