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CODES
2003
IEEE
15 years 2 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel
SAC
2004
ACM
15 years 2 months ago
Combining analysis and synthesis in a model of a biological cell
for ideas, and then abstract away from these ideas to produce algorithmic processes that can create problem solutions in a bottom-up manner. We have previously described a top-dow...
Ken Webb, Tony White
POPL
2005
ACM
15 years 9 months ago
Synthesis of interface specifications for Java classes
While a typical software component has a clearly specified (static) interface in terms of the methods and the input/output types they support, information about the correct sequen...
P. Madhusudan, Pavol Cerný, Rajeev Alur, Wo...
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 1 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
SAMOS
2007
Springer
15 years 3 months ago
An Evolutionary Approach to Area-Time Optimization of FPGA designs
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...
Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Paler...