Sciweavers

1547 search results - page 171 / 310
» Solving Knapsack Problems in a Sticker Based Model
Sort
View
GECCO
2007
Springer
212views Optimization» more  GECCO 2007»
15 years 9 months ago
A developmental model of neural computation using cartesian genetic programming
The brain has long been seen as a powerful analogy from which novel computational techniques could be devised. However, most artificial neural network approaches have ignored the...
Gul Muhammad Khan, Julian F. Miller, David M. Hall...
101
Voted
DAC
2006
ACM
16 years 4 months ago
Topology aware mapping of logic functions onto nanowire-based crossbar architectures
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
CORR
2010
Springer
120views Education» more  CORR 2010»
15 years 3 months ago
Modeling of 2D and 3D Assemblies Taking Into Account Form Errors of Plane Surfaces
The tolerancing process links the virtual and the real worlds. From the former, tolerances define a variational geometrical language (geometric parameters). From the latter, there...
Serge Samper, Pierre-Antoine Adragna, Hugues Favre...
130
Voted
VTC
2007
IEEE
121views Communications» more  VTC 2007»
15 years 9 months ago
Downlink Traffic Power Characterization for Multi-Rate Wireless CDMA Data Networks
— The characterization of downlink traffic power is an important issue for the design of efficient call admission control (CAC) and radio resource management (RRM) procedures. In...
Ashraf S. Hasan Mahmoud
147
Voted
TCAD
2008
136views more  TCAD 2008»
15 years 3 months ago
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar