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ICPP
2009
IEEE
15 years 4 months ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
CORR
2008
Springer
104views Education» more  CORR 2008»
14 years 11 months ago
A General Notion of Useful Information
In this paper we introduce a general framework for defining the depth of a sequence with respect to a class of observers. We show that our general framework captures all depth not...
Philippe Moser
WCE
2007
14 years 11 months ago
Data Communication and Parallel Computing on Twisted Hypercubes
Massively parallel distributed-memory architectures are receiving increasing attention to meet the increasing demand on processing power. Many topologies have been proposed for int...
Emad Abuelrub
MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
14 years 7 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...
WABI
2007
Springer
139views Bioinformatics» more  WABI 2007»
15 years 4 months ago
Computability of Models for Sequence Assembly
Graph-theoretic models have come to the forefront as some of the most powerful and practical methods for sequence assembly. Simultaneously, the computational hardness of the underl...
Paul Medvedev, Konstantinos Georgiou, Gene Myers, ...