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VLSI
2007
Springer
15 years 7 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
TCAD
2010
194views more  TCAD 2010»
14 years 8 months ago
Layout Decomposition Approaches for Double Patterning Lithography
Abstract--In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different ex...
Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Ya...
AADEBUG
1997
Springer
15 years 5 months ago
Backwards-Compatible Bounds Checking for Arrays and Pointers in C Programs
This paper presents a new approach to enforcing array bounds and pointer checking in the C language. Checking is rigorous in the sense that the result of pointer arithmetic must r...
Richard W. M. Jones, Paul H. J. Kelly
APSEC
2007
IEEE
15 years 5 months ago
Realizability of Collaboration-based Service Specifications
This paper is concerned with compositional specification of services using UML 2 collaborations, activity and interaction diagrams. It addresses the problem of realizability: give...
Humberto Nicolás Castejón, Rolv Br&a...
DAGSTUHL
1996
15 years 2 months ago
A Uniform Approach for Compile-Time and Run-Time Specialization
As partial evaluation gets more mature, it is now possible to use this program transformation technique to tackle realistic languages and real-size application programs. However, t...
Charles Consel, Luke Hornof, François No&eu...