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» Source Address Validation: Architecture and Protocol Design
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91
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DAC
2008
ACM
16 years 19 days ago
On reliable modular testing with vulnerable test access mechanisms
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
Lin Huang, Feng Yuan, Qiang Xu
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
15 years 5 months ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...
147
Voted
HPCA
2002
IEEE
15 years 12 months ago
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach
Power dissipation has become one of the most critical factors for the continued development of both high-end and low-end computer systems. The successful design and evaluation of ...
Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary J...
87
Voted
HPDC
1999
IEEE
15 years 3 months ago
Remote Application Scheduling on Metacomputing Systems
Efficient and robust metacomputing requires the decomposition of complex jobs into tasks that must be scheduled on distributed processing nodes. There are various ways of creating...
Heath A. James, Kenneth A. Hawick
88
Voted
BMCBI
2007
167views more  BMCBI 2007»
14 years 11 months ago
MindSeer: a portable and extensible tool for visualization of structural and functional neuroimaging data
Background: Three-dimensional (3-D) visualization of multimodality neuroimaging data provides a powerful technique for viewing the relationship between structure and function. A n...
Eider B. Moore, Andrew V. Poliakov, Peter Lincoln,...