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EUROPAR
2001
Springer
15 years 2 months ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita
EOR
2006
104views more  EOR 2006»
14 years 9 months ago
Financial networks with intermediation: Risk management with variable weights
: In this paper, we develop a framework for the modeling, analysis, and computation of solutions to multitiered financial network problems with intermediaries in which both the sou...
Anna Nagurney, Ke Ke
ICCD
2005
IEEE
90views Hardware» more  ICCD 2005»
15 years 3 months ago
Variability-Driven Buffer Insertion Considering Correlations
— In this work we investigate the buffer insertion problem under process variations. Sub 100-nm fabrication process causes significant variations on many design parameters. We p...
Azadeh Davoodi, Ankur Srivastava
ARCS
2004
Springer
15 years 3 months ago
Heterogenous Data Fusion via a Probabilistic Latent-Variable Model
In a pervasive computing environment, one is facing the problem of handling heterogeneous data from different sources, transmitted over heterogeneous channels and presented on het...
Kai Yu, Volker Tresp
PAMI
2006
122views more  PAMI 2006»
14 years 9 months ago
Total Variation Models for Variable Lighting Face Recognition
In this paper, we present the logarithmic total variation (LTV) model for face recognition under varying illumination, including natural lighting conditions, where we rarely know t...
Terrence Chen, Wotao Yin, Xiang Sean Zhou, Dorin C...