Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
: In this paper, we develop a framework for the modeling, analysis, and computation of solutions to multitiered financial network problems with intermediaries in which both the sou...
— In this work we investigate the buffer insertion problem under process variations. Sub 100-nm fabrication process causes significant variations on many design parameters. We p...
In a pervasive computing environment, one is facing the problem of handling heterogeneous data from different sources, transmitted over heterogeneous channels and presented on het...
In this paper, we present the logarithmic total variation (LTV) model for face recognition under varying illumination, including natural lighting conditions, where we rarely know t...
Terrence Chen, Wotao Yin, Xiang Sean Zhou, Dorin C...