604 search results - page 106 / 121 » Sparse Power Efficient Topology for Wireless Networks |
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
IWIA
2005
IEEE
15 years 3 months ago
2005
IEEE
1 Intrusion detection in MANETs is challenging because these networks change their topologies dynamically; lack concentration points where aggregated traffic can be analyzed; utili...
TC
2008
14 years 9 months ago
2008
The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic n...
SUTC
2010
IEEE
14 years 8 months ago
2010
IEEE
— Symbol synchronization is a critical component in the design of an underwater acoustic modem. Without accurate symbol synchronization, higher bit error rates incur thus reduc...
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ERSA
2009
14 years 7 months ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...