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ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
15 years 4 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
112
Voted
FCCM
2009
IEEE
139views VLSI» more  FCCM 2009»
14 years 10 months ago
Memory-Efficient Pipelined Architecture for Large-Scale String Matching
We propose a pipelined field-merge architecture for memory-efficient and high-throughput large-scale string matching (LSSM). Our proposed architecture partitions the (8-bit) charac...
Yi-Hua Edward Yang, Viktor K. Prasanna
73
Voted
DASFAA
2009
IEEE
123views Database» more  DASFAA 2009»
15 years 7 months ago
A Reprocessing Model Based on Continuous Queries for Writing Data to RFID Tag Memory
This paper investigates the problem of writing data to passive RFID tag memory and proposes a reprocessing model for assuring the atomicity and durability of writing transactions i...
Wooseok Ryu, Bonghee Hong
FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
15 years 4 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
99
Voted
NIPS
2004
15 years 2 months ago
Modeling Conversational Dynamics as a Mixed-Memory Markov Process
In this work, we quantitatively investigate the ways in which a given person influences the joint turn-taking behavior in a conversation. After collecting an auditory database of ...
Tanzeem Choudhury, Sumit Basu