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HPCA
2000
IEEE
15 years 2 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
90
Voted
HPDC
1999
IEEE
15 years 2 months ago
Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
Samir Koussih, Anurag Acharya, Sanjeev Setia
76
Voted
PDIS
1994
IEEE
15 years 1 months ago
Achieving Transaction Scaleup on Unix
Constructing scalable high-performance applications on commodity hardware running the Unix operating system is a problem that must be addressed in several application domains. We ...
Marie-Anne Neimat, Donovan A. Schneider
ICDCS
2010
IEEE
15 years 1 months ago
On the Impact of MIMO Diversity on Higher Layer Performance
Abstract—In this paper, we shed light on the cross-layer interactions between the PHY, link and routing layers in networks with MIMO links operating in the diversity mode. Many p...
Ece Gelal, Konstantinos Pelechrinis, Ioannis Brous...
73
Voted
IPPS
2010
IEEE
14 years 7 months ago
Modeling and analyzing the effects of firewalls and NATs in P2P swarming systems
Many P2P systems have been designed without taking into account an important factor: a large fraction of Internet users nowadays are located behind a network address translator (NA...
Lucia D'Acunto, Michel Meulpolder, Rameez Rahman, ...