Sciweavers

4045 search results - page 799 / 809
» Special Section on Parallel Distributed Computing and Networ...
Sort
View
CEC
2009
IEEE
15 years 1 months ago
JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator
This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous...
Olivier Brousse, Jérémie Guillot, Th...
ICDCSW
2003
IEEE
15 years 2 months ago
Convergence of IPsec in Presence of Resets
IPsec is the current security standard for the Internet Protocol IP. According to this standard, a selected computer pair (p, q) in the Internet can be designated a “security ass...
Chin-Tser Huang, Mohamed G. Gouda, E. N. Elnozahy
HOTI
2005
IEEE
15 years 3 months ago
Performance Characterization of a 10-Gigabit Ethernet TOE
Though traditional Ethernet based network architectures such as Gigabit Ethernet have suffered from a huge performance difference as compared to other high performance networks (e...
Wu-chun Feng, Pavan Balaji, C. Baron, Laxmi N. Bhu...
EUROPAR
2005
Springer
15 years 3 months ago
Cost / Performance Trade-Offs and Fairness Evaluation of Queue Mapping Policies
Whereas the established interconnection networks (ICTN) achieve low latency by operating in the linear region, i.e. oversizing the fabric, the recent strict cost and power constrai...
Teresa Nachiondo Frinós, Jose Flich, Jos&ea...
SIAMCOMP
2000
118views more  SIAMCOMP 2000»
14 years 9 months ago
Constructive, Deterministic Implementation of Shared Memory on Meshes
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
Andrea Pietracaprina, Geppino Pucci, Jop F. Sibeyn