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TSMC
2008
119views more  TSMC 2008»
14 years 9 months ago
An Efficient Binary-Decision-Diagram-Based Approach for Network Reliability and Sensitivity Analysis
Abstract--Reliability and sensitivity analysis is a key component in the design, tuning, and maintenance of network systems. Tremendous research efforts have been expended in this ...
Liudong Xing
ENTCS
2006
139views more  ENTCS 2006»
14 years 9 months ago
Goto and Concurrency Introducing Safe Jumps in Esterel
Esterel is a design language for the specification of real time embedded systems. Based on the synchronous concurrency paradigm, its semantics describes execution
Olivier Tardieu
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 3 months ago
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Sudeep Pasricha, Nikil D. Dutt
DATE
2004
IEEE
164views Hardware» more  DATE 2004»
15 years 1 months ago
System Design Using Kahn Process Networks: The Compaan/Laura Approach
New emerging embedded system platforms in the realm of highthroughput multimedia, imaging, and signal processing will consist of multiple microprocessors and reconfigurable compon...
Todor Stefanov, Claudiu Zissulescu, Alexandru Turj...
LCTRTS
1998
Springer
15 years 2 months ago
A Tool to Assist in Fine-Tuning and Debugging Embedded Real-Time Systems
: During the latter stages of a software product cycle, developers may be faced with the task of fine-tuning an embedded system that is not meeting all of its timing requirements. ...
Gaurav Arora, David B. Stewart