687 search results - page 39 / 138 » Specification and Verification of Model Transformations Usin... |
184
Voted
B
2007
Springer
15 years 4 months ago
2007
Springer
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
110
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SIGSOFT
2007
ACM
16 years 1 months ago
2007
ACM
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
126
Voted
CODES
2008
IEEE
15 years 2 months ago
2008
IEEE
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
106
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CORR
2010
Springer
15 years 18 days ago
2010
Springer
Reusable software components need well-defined interfaces, rigorously and completely documented features, and a design amenable both to reuse and to formal verification; all these...
123
Voted
SIGSOFT
2007
ACM
16 years 1 months ago
2007
ACM
Finding flaws in security protocol implementations is hard. Finding flaws in the implementations of sensor network security protocols is even harder because they are designed to p...