Sciweavers

723 search results - page 10 / 145
» Speculative Dynamic Vectorization
Sort
View
ICS
2009
Tsinghua U.
15 years 6 months ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
CGO
2003
IEEE
15 years 3 months ago
Optimal and Efficient Speculation-Based Partial Redundancy Elimination
Existing profile-guided partial redundancy elimination (PRE) methods use speculation to enable the removal of partial redundancies along more frequently executed paths at the expe...
Qiong Cai, Jingling Xue
99
Voted
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
15 years 5 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
15 years 5 months ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth
RE
2002
Springer
14 years 11 months ago
Automating Speculative Queries through Event-Based Requirements Traceability
Posing speculative questions about a software system is an important yet often unsupported activity. Current impact analysis techniques tend to focus upon the functionality of the...
Jane Cleland-Huang, Carl K. Chang, Gaurav Sethi, K...