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PDCN
2007
15 years 1 months ago
Design and evaluation of an auto-memoization processor
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
Tomoaki Tsumura, Ikuma Suzuki, Yasuki Ikeuchi, Hir...
ACSD
2005
IEEE
114views Hardware» more  ACSD 2005»
15 years 5 months ago
Controlling Speculative Design Processes Using Rich Component Models
This paper elaborates on the application of some aspects of robust systems control theory to the management of uncertainty and risk in distributed and complex design processes, ha...
Werner Damm
HIPEAC
2007
Springer
15 years 5 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
CODES
2006
IEEE
15 years 5 months ago
Challenges in exploitation of loop parallelism in embedded applications
Embedded processors have been increasingly exploiting hardware parallelism. Vector units, multiple processors or cores, hyper-threading, special-purpose accelerators such as DSPs ...
Arun Kejariwal, Alexander V. Veidenbaum, Alexandru...
IPL
2010
59views more  IPL 2010»
14 years 10 months ago
Log' version vector: Logging version vectors concisely in dynamic replication
Hyun-Gul Roh, Myeongjae Jeon, Euiseong Seo, Jinsoo...