918 search results - page 11 / 184 » Speculative Issue Logic |
LCPC
2001
Springer
15 years 6 months ago
2001
Springer
Abstract. We describe the structure of a compilation system that generates code for processor architectures supporting both explicit and implicit parallel threads. Such architectur...
119
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TCAD
2008
15 years 1 months ago
2008
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
99
Voted
HPCA
2009
IEEE
16 years 2 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
107
Voted
ICS
2001
Tsinghua U.
15 years 6 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
124
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ISCA
2002
IEEE
15 years 1 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...