Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
We report on work in progress regarding a foundation for the notion of meta-variable in logical frameworks and type theories. Our proposal is to treat meta-variables as modal varia...
Aleksandar Nanevski, Brigitte Pientka, Frank Pfenn...
We report about some preliminary issues from the DFG project “Description Logics and Spatial Reasoning” (“DLS”, DFG Grant NE 279/8-1), one of whose goals is to develop a p...
After being niche markets for several years, application markets for one-chip integration of large DRAMs and logic circuits are growing very rapidly as the transition to 0.25