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» Speculative Issue Logic
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HPCA
2004
IEEE
16 years 2 months ago
Understanding Scheduling Replay Schemes
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
Ilhyun Kim, Mikko H. Lipasti
HPCA
2005
IEEE
16 years 2 months ago
Software Directed Issue Queue Power Reduction
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
Antonio González, Jaume Abella, Michael F. ...
ISCA
1997
IEEE
114views Hardware» more  ISCA 1997»
15 years 6 months ago
Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, t...
Sriram Vajapeyam, Tulika Mitra
FCCM
2003
IEEE
113views VLSI» more  FCCM 2003»
15 years 7 months ago
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
Kenneth Eguro, Scott Hauck
FORTE
1994
15 years 3 months ago
Four issues concerning the semantics of Message Flow Graphs
We discuss four issues concerning the semantics of Message Flow Graphs (MFGs). MFGs are extensively used as pictures of message-passing behavior. One type of MFG, Message Sequence...
Peter B. Ladkin, Stefan Leue