122 search results - page 20 / 25 » Speculative Parallel Threading Architecture and Compilation |
103
Voted
MICRO
2007
IEEE
15 years 6 months ago
2007
IEEE
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
HPCS
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper presents the initial design of the Cyclops-64 (C64) system software infrastructure and tools under development as a joint effort between IBM T.J. Watson Research Center...
195
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MICRO
2000
IEEE
14 years 11 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
117
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PPOPP
2009
ACM
16 years 5 days ago
2009
ACM
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
107
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ICS
2007
Tsinghua U.
15 years 5 months ago
2007
Tsinghua U.
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...