122 search results - page 8 / 25 » Speculative Parallel Threading Architecture and Compilation |
113
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IPPS
2003
IEEE
15 years 6 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
111
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IPPS
1999
IEEE
15 years 5 months ago
1999
IEEE
Abstract. The combination of a language with ne-grain implicit parallelism and a data
ow evaluation scheme is suitable for high-level programming on massively parallel architectur...
111
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ISCA
2003
IEEE
15 years 6 months ago
2003
IEEE
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
162
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PLDI
2004
ACM
15 years 6 months ago
2004
ACM
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
129
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ISCAPDCS
2003
15 years 2 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...