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» Speculative execution in a distributed file system
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CJ
2006
84views more  CJ 2006»
14 years 11 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
ICDCS
2000
IEEE
15 years 4 months ago
Active Files: A Mechanism for Integrating Legacy Applications into Distributed Systems
Despite increasingly distributed internet information sources with diverse storage formats and access-control constraints, most of the end applications (e.g., filters and media p...
Partha Dasgupta, Ayal Itzkovitz, Vijay Karamcheti
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
14 years 9 months ago
Scalable Speculative Parallelization on Commodity Clusters
While clusters of commodity servers and switches are the most popular form of large-scale parallel computers, many programs are not easily parallelized for execution upon them. In...
Hanjun Kim, Arun Raman, Feng Liu, Jae W. Lee, Davi...
HPCA
2008
IEEE
15 years 6 months ago
Speculative instruction validation for performance-reliability trade-off
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
ICDCN
2012
Springer
13 years 7 months ago
Lifting the Barriers - Reducing Latencies with Transparent Transactional Memory
Synchronization in distributed systems is expensive because, in general, threads must stall to obtain a lock or to operate on volatile data. Transactional memory, on the other hand...
Annette Bieniusa, Thomas Fuhrmann