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IPPS
2000
IEEE
15 years 1 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
GRAPHICSINTERFACE
2004
14 years 10 months ago
A Hybrid Hardware-Accelerated Algorithm for High Quality Rendering of Visual Hulls
In this paper, a novel hybrid algorithm is presented for the fast construction and high-quality rendering of visual hulls. We combine the strengths of two complementary hardware-a...
Ming Li, Marcus A. Magnor, Hans-Peter Seidel
VLDB
2004
ACM
114views Database» more  VLDB 2004»
15 years 2 months ago
Hardware Acceleration in Commercial Databases: A Case Study of Spatial Operations
Traditional databases have focused on the issue of reducing I/O cost as it is the bottleneck in many operations. As databases become increasingly accepted in areas such as Geograp...
Nagender Bandi, Chengyu Sun, Amr El Abbadi, Divyak...
CGO
2007
IEEE
15 years 3 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
ATAL
2005
Springer
15 years 3 months ago
Preprocessing techniques for accelerating the DCOP algorithm ADOPT
Methods for solving Distributed Constraint Optimization Problems (DCOP) have emerged as key techniques for distributed reasoning. Yet, their application faces significant hurdles...
Syed Muhammad Ali, Sven Koenig, Milind Tambe