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DAC
2006
ACM
16 years 24 days ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
16 years 6 days ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
HPCA
2008
IEEE
16 years 6 days ago
Address-branch correlation: A novel locality for long-latency hard-to-predict branches
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zho...
HPCA
2005
IEEE
16 years 6 days ago
Checkpointed Early Load Retirement
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...
Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, Jos...
SIGMOD
2009
ACM
190views Database» more  SIGMOD 2009»
16 years 2 days ago
Optimizing complex extraction programs over evolving text data
Most information extraction (IE) approaches have considered only static text corpora, over which we apply IE only once. Many real-world text corpora however are dynamic. They evol...
Fei Chen 0002, Byron J. Gao, AnHai Doan, Jun Yang ...