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ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
15 years 4 months ago
A Scalable Instruction Queue Design Using Dependence Chains
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
Steven E. Raasch, Nathan L. Binkert, Steven K. Rei...
HPCA
2000
IEEE
15 years 3 months ago
Software-Controlled Multithreading Using Informing Memory Operations
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
Todd C. Mowry, Sherwyn R. Ramkissoon
BTW
1999
Springer
157views Database» more  BTW 1999»
15 years 3 months ago
Database Primitives for Spatial Data Mining
Abstract: Spatial data mining algorithms heavily depend on the efficient processing of neighborhood relations since the neighbors of many objects have to be investigated in a singl...
Martin Ester, Stefan Grundlach, Hans-Peter Kriegel...
PLDI
1994
ACM
15 years 3 months ago
The Program Structure Tree: Computing Control Regions in Linear Time
In this paper, we describe the program structure tree (PST), a hierarchical representation of program structure based on single entry single exit (SESE) regions of the control flo...
Richard Johnson, David Pearson, Keshav Pingali
DEBS
2009
ACM
15 years 3 months ago
MICS: an efficient content space representation model for publish/subscribe systems
One of the main challenges faced by content-based publish/subscribe systems is handling large amount of dynamic subscriptions and publications in a multidimensional content space....
Hojjat Jafarpour, Sharad Mehrotra, Nalini Venkatas...