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» Speeding up power estimation of embedded software
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107
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CASES
2009
ACM
15 years 5 months ago
Exploiting residue number system for power-efficient digital signal processing in embedded processors
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
15 years 7 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
MM
2004
ACM
109views Multimedia» more  MM 2004»
15 years 7 months ago
Practical voltage scaling for mobile multimedia devices
This paper presents the design, implementation, and evaluation of a practical voltage scaling (PDVS) algorithm for mobile devices primarily running multimedia applications. PDVS s...
Wanghong Yuan, Klara Nahrstedt
97
Voted
TCAD
2002
86views more  TCAD 2002»
15 years 1 months ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
109
Voted
ICES
2005
Springer
138views Hardware» more  ICES 2005»
15 years 7 months ago
A Flexible On-Chip Evolution System Implemented on a Xilinx Virtex-II Pro Device
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
Kyrre Glette, Jim Torresen