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103
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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
15 years 3 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
EGH
2004
Springer
15 years 2 months ago
Mio: fast multipass partitioning via priority-based instruction scheduling
Real-time graphics hardware continues to offer improved resources for programmable vertex and fragment shaders. However, shader programmers continue to write shaders that require ...
Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mar...
87
Voted
IPPS
1996
IEEE
15 years 1 months ago
Practical Parallel Algorithms for Dynamic Data Redistribution, Median Finding, and Selection
A common statistical problem is that of nding the median element in a set of data. This paper presents a fastand portable parallel algorithm for nding the median given a set of el...
David A. Bader, Joseph JáJá
86
Voted
USENIX
2004
14 years 11 months ago
REX: Secure, Extensible Remote Execution
The ubiquitous SSH package has demonstrated the importance of secure remote login and execution. As remote execution tools grow in popularity, users require new features and exten...
Michael Kaminsky, Eric Peterson, Daniel B. Giffin,...
101
Voted
UAI
2007
14 years 10 months ago
"I Can Name that Bayesian Network in Two Matrixes!"
The traditional approach to building Bayesian networks is to build the graphical structure using a graphical editor and then add probabilities using a separate spreadsheet for eac...
Russell Almond