150 search results - page 28 / 30 » Staged memory scheduling: Achieving high performance and sca... |
LCTRTS
2005
Springer
13 years 11 months ago
2005
Springer
Real-time garbage collection has been shown to be feasible, but for programs with high allocation rates, the utilization achievable is not sufficient for some systems. Since a hi...
FPGA
2010
ACM
13 years 6 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
CODES
2009
IEEE
13 years 10 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
OSDI
2004
ACM
14 years 6 months ago
2004
ACM
FFPF is a network monitoring framework designed for three things: speed (handling high link rates), scalability (ability to handle multiple applications) and flexibility. Multiple...
IEEEPACT
2007
IEEE
14 years 16 days ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...