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ICS
1995
Tsinghua U.
15 years 3 months ago
Optimum Modulo Schedules for Minimum Register Requirements
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...
Alexandre E. Eichenberger, Edward S. Davidson, San...
FDL
2008
IEEE
15 years 1 months ago
Scenario-based Validation of Embedded Systems
This paper describes a scenario-based methodology em-level design validation based on the Abstract State Machines formal method. This scenario-based approach complements an existi...
Angelo Gargantini, Elvinia Riccobene, Patrizia Sca...
DAGSTUHL
2006
15 years 1 months ago
Denial of Service Protection with Beaver
We present Beaver, a method and architecture to "build dams" to protect servers from Denial of Service (DoS) attacks. Beaver allows efficient filtering of DoS traffic us...
Gal Badishi, Idit Keidar, Amir Herzberg, Oleg Roma...
TCAD
1998
82views more  TCAD 1998»
14 years 11 months ago
Structural methods for the synthesis of speed-independent circuits
Most existing tools for the synthesisof asynchronouscircuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper ...
Enric Pastor, Jordi Cortadella, Alex Kondratyev, O...
DAC
2005
ACM
16 years 23 days ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...