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ISCIS
2005
Springer
15 years 10 months ago
Generalizing Redundancy Elimination in Checking Sequences
Abstract. Based on a distinguishing sequence for a Finite State Machine (FSM), an efficient checking sequence may be produced from the elements of a set Eα of α –sequences and ...
K. Tuncay Tekle, Hasan Ural, M. Cihan Yalcin, H&uu...
DFT
2003
IEEE
246views VLSI» more  DFT 2003»
15 years 10 months ago
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
Konstantinos Rokas, Yiorgos Makris, Dimitris Gizop...
DATE
2000
IEEE
83views Hardware» more  DATE 2000»
15 years 9 months ago
Wave Steered FSMs
In this paper we address the problem of designing very high throughput finite state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward and g...
Luca Macchiarulo, Shih-Ming Shu, Malgorzata Marek-...
DCC
1999
IEEE
15 years 9 months ago
Utilizing Soft Information in Decoding of Variable Length Codes
We present a method for utilizing soft information in decoding of variable length codes (VLCs). When compared with traditional VLC decoding, which is performed using "hard&quo...
Jiangtao Wen, John D. Villasenor
CAV
1998
Springer
138views Hardware» more  CAV 1998»
15 years 8 months ago
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs
bstract description of state machines (ASMs), in which data and data operations are d using abstract sort and uninterpreted function symbols. ASMs are suitable for describing Regis...
Ying Xu, Eduard Cerny, Xiaoyu Song, Francisco Core...