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DSD
2006
IEEE
113views Hardware» more  DSD 2006»
15 years 6 months ago
Cascade Scheme for Concurrent Errors Detection
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladi...
CSREAESA
2003
15 years 6 months ago
Design of Digital Circuits on the Basis of Hardware Templates
The paper presents a technique for the design of digital circuits based on reusable hardware templates (HT). Any HT is being constructed in such a way that it might be employed for...
Valery Sklyarov, Iouliia Skliarova
ISCAPDCS
2004
15 years 6 months ago
Practical Byzantine Fault Tolerance Using Fewer than 3f+1 Active Replicas
Byzantine fault tolerant state machine replication (BFT-SMR) is a foundation for implementations of highly reliable services. Existing algorithms for BFT-SMR require at least 3f +...
Ming Li, Yuval Tamir
117
Voted
IADIS
2003
15 years 6 months ago
XML User Interfaces for Collaborative Mobile Virtual Communities
In [7], we reported on our experience in building Collaborative Mobile Virtual Communities (CMVC) on the Web. In [8], we proposed a finite state machine model and a new approach t...
Jalal Kawash
144
Voted
PTS
2004
94views Hardware» more  PTS 2004»
15 years 6 months ago
FSM Based Interoperability Testing Methods for Multi Stimuli Model
In this paper, we propose two fault models and methods for the derivation of interoperability test suites when the system implementation is given in the form of two deterministic c...
Khaled El-Fakih, Vadim Trenkaev, Natalia Spitsyna,...