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DAC
1994
ACM
15 years 2 months ago
Exact Minimum Cycle Times for Finite State Machines
In current research, the minimum cycle times of finite state machines are estimated by computing the delays of the combinational logic in the finite state machines. Even though th...
William K. C. Lam, Robert K. Brayton, Alberto L. S...
ASPDAC
2001
ACM
94views Hardware» more  ASPDAC 2001»
15 years 1 months ago
On speeding up extended finite state machines using catalyst circuitry
We propose a timing optimization technique for a complex finite state machine that consists of not only random logic but also data operators. In such a design, the timing critical...
Shi-Yu Huang
FASE
2006
Springer
15 years 1 months ago
Regular Inference for State Machines with Parameters
Techniques for inferring a regular language, in the form of a finite automaton, from a sufficiently large sample of accepted and nonaccepted input words, have been employed to cons...
Therese Berg, Bengt Jonsson, Harald Raffelt
SEC
2003
14 years 11 months ago
From Finite State Machines to Provably Correct Java Card Applets
Abstract This paper presents a systematic approach to developing Java Card applets and/or formal specifications for them, starting from descriptions in the form of finite state m...
Engelbert Hubbers, Martijn Oostdijk, Erik Poll
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
15 years 2 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill